This invention relates to an electronic computer system, and more particularly to an access control system for making access to a memory device from a plurality of memory utilization devices in the computer.
Usually in a micro-computer system one processor is connected to one memory device and the access to the memory device is monopolized by the processor. Accordingly, the processor can have an access to the memory device at any time but the memory device is idle while the processor is processing data therein.
Accordingly, if it were possible to efficiently utilize the memory device the efficiency of the overall computer system would be improved. For this reason, it is desirable to further connect an additional processor to the memory device or to further connect a direct memory access control device to the memory device in order to directly transfer data between an input-output device and the memory device. In such system the memory device can be accessed by a plurality of memory utilization devices, but when the memory utilization devices are operating independently, the memory utilization devices may have simultaneous access to the memory device thereby mixing together information or data from the devices. For this reason, it is necessary to properly arrange access requests from a plurality of memory utilization devices for the same memory device.
In order to avoid overlapping of access to the same memory device from a plurality of memory utilization devices it is advantageous to construct the computer system such that only a memory utilization device now requiring an access to the memory device issues an access request, that a right of access is given to the memory utilization device which is issuing an access request, that where a plurality of memory utilization devices simultaneously issues memory access requests, the right of access is given to only one memory utilization device and other memory utilization devices are caused to wait for the next chance. A processor or a direct memory access control device utilized in such an access distributing system is required to be provided with a signal line or a terminal for issuing a memory access request, and a signal line or a terminal for detecting that the memory device has acknowledged the access request.
A processor utilized in a micro-computer is made up of a LSI so that the need for provision of two signal lines or terminals for the access distribution control described above is not desirable.